1. Technical Field
The present disclosure relates to a circuit for delaying a PSON (Power Supply ON) signal.
2. Description of Related Art
The micro ATX and ATX specifications recommend a 24-pin main connector interface for power supply. This interface incorporates standard ±5V, ±12V, 3.3V, 5V standby, and soft-power signals. Proper implementation of PSON#, 5 VSB, and PW-OK is required for an ATX-compliant power supply.
PSON# is an active low TTL (Transistor-Transistor Logic) signal that turns on all of the main power rails including 3.3V, 5V, −5V, 12V, and −12V power rails. When this signal is held high by the PC board or left open-circuited, outputs of the power rails should not deliver current and should be held at a zero potential with respect to ground. Power should be delivered to the rails only if the PSON# signal is held at ground potential.
FIG. 1 shows a typical motherboard of a computer system including an ATX power connector mated with a corresponding connector of an ATX power supply, an ICH (I/O Controller Hub), and a Super I/O. During powering up the motherboard, the ICH receives a RSMRST# signal which indicates that the standby signal 5 VSB is OK. Then, the ICH is responsive to a PWRBTN# (Power Button) signal for turning on the power supply and sends a high level SLP_S3# signal to the Super I/O. After receiving the high level SLP_S3# signal, the Super I/O sends a low level PSON# signal to the PSON pin of the power connector to turn on all of the power rails of the power supply.
Sometimes, the power button is triggered repeatedly in a very short time interval, and the power rails of the power supply do not have time to power up/down fully, which may cause power up/down sequence failure.
Therefore, a circuit for delaying the PSON signal to prevent the above described power up/down failure is desired.